Synthesis and Optimization of DSP Algorithms/Синтез и оптимизация алгоритмов цифровой обработки сигналов

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Артикул:00-01050824
Автор: George A. Constantinides, Peter Y.K. Cheung, Wayne Luk
ISBN: 1-4020-7930-3
Обложка: Мягкая обложка
Издательство: Kluwer Academic Publishers (все книги издательства)
Город: New York
Страниц: 177
Год: 2004
Вес: 443 г

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Книга на английском языке.
Digital signal processing (DSP) has undergone an immense expansion since the foundations of the subject were laid in the 1970s. New application areas have arisen, and DSP technology is now essential to a bewildering array of fields such as computer vision, instrumentation and control, data compression, speech recognition and synthesis, digital audio and cameras, mobile telephony, echo cancellation, and even active suspension in the automotive industry.
In parallel to, and intimately linked with, the growth in application areas has been the growth in raw computational power available to implement DSP algorithms. Moore’s law continues to hold in the semiconductor industry, resulting every 18 months in a doubling of the number of computations we can perform.
Despite the rapidly increasing performance of microprocessors, the computational demands of many DSP algorithms continue to outstrip the available computational power. As a result, many custom hardware implementations of DSP algorithms are produced - a time consuming and complex process, which the techniques described in this book aim, at least partially, to automate.
This book provides an overview of recent research on hardware synthesis an optimization of custom hardware implementations of digital signal processors. It focuses on techniques for automating the production of area-efficient designs from a high-level description, while satisfying user-specified constraints. Such techniques are shown to be applicable to both linear and nonlinear systems: from finite impulse response (FIR) and infinite impulse response (IIR) filters to designs for discrete cosine transform (DCT), polyphase filter banks, and adaptive least mean square (LMS) filters.
This book is designed for those working near the interface of DSP algorithm design and DSP implementation. It is our contention that this interface is a very exciting place to be, and we hope this book may help to draw the reader nearer to it.

Contents
1 Introduction
1.1 Objectives
1.2 Overview
2 Background
2.1 Digital Design for DSP Engineers
2.1.1 Microprocessors vs. Digital Design
2.1.2 The Field-Programmable Gate Array
2.1.3 Arithmetic on FPGAs
2.2 DSP for Digital Designers
2.3 Computation Graphs
2.4 The Multiple Word-Length Paradigm
2.5 Summary
3 Peak Value Estimation
3.1 Analytic Peak Estimation
3.1.1 Linear Time-Invariant Systems
3.1.2 Data-range Propagation
3.2 Simulation-based Peak Estimation
3.3 Hybrid Techniques
3.4 Summary
4 Word-Length Optimization
4.1 Error Estimation
4.1.1 Word-Length Propagation and Conditioning
4.1.2 Linear Time-Invariant Systems
4.1.3 Extending to Nonlinear Systems
4.2 Area Models
4.3 Problem Definition and Analysis
4.3.1 Convexity and Monotonicity
4.4 Optimization Strategy 1: Heuristic Search
4.5 Optimization Strategy 2: Optimum Solutions
4.5.1 Word-Length Bounds
4.5.2 Adders
4.5.3 Forks
4.5.4 Gains and Delays
4.5.5 MILP Summary
4.6 Some Results
4.6.1 Linear Time-Invariant Systems
4.6.2 Nonlinear Systems
4.6.3 Limit-cycles in Multiple Word-Length Implementations
4.7 Summary
5 Saturation Arithmetic
5.1 Overview
5.2 Saturation Arithmetic Overheads
5.3 Preliminaries
5.4 Noise Model
5.4.1 Conditioning an Annotated Computation Graph
5.4.2 The Saturated Gaussian Distribution
5.4.3 Addition of Saturated Gaussians
5.4.4 Error Propagation
5.4.5 Reducing Bound Slackness
5.4.6 Error estimation results
5.5 Combined Optimization
5.6 Results and Discussion
5.6.1 Area Results
5.6.2 Clock frequency results
5.7 Summary
6 Scheduling and Resource Binding
6.1 Overview
6.2 Motivation and Problem Formulation
6.3 Optimum Solutions
6.3.1 Resources, Instances and Control Steps
6.3.2 ILP Formulation
6.4 A Heuristic Approach
6.4.1 Overview
6.4.2 Word-Length Compatibility Graph
6.4.3 Resource Bounds
6.4.4 Latency Bounds
6.4.5 Scheduling with Incomplete Word-Length Information
6.4.6 Combined Binding and Word-Length Selection
6.4.7 Refining Word-Length Information
6.5 Some Results
6.6 Summary
7 Conclusion
7.1 Summary
7.2 Future Work
A Notation
A.1 Sets and functions
A.2 Vectors and Matrices
A.3 Graphs
A.4 Miscellaneous
A.5 Pseudo-Code
References
Index

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